General Description
Each of these Schottky-clamped data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection to the AND-OR gates. Separate output control inputs are provided for each of the two four-line sections.
The 3-STATE outputs can interface directly with data lines of bus-organized systems. With all but one of the common outputs disabled (at a high impedance state), the low impedance of the single enable output will drive the bus line to a HIGH or LOW logic level.

Features
■ 3-STATE version of S153 with same pin-out
■ Schottky-diode-clamped transistors
■ Permits multiplexing from N lines to 1 line
■ Performs parallel-T-serial conversion
■ Strobe/output control
■ High fan-out totem-pole outputs
■ Typical propagation delay
    From data to output 6 ns
    From select to output 12 ns
■ Typical power dissipation 275 mW