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# Example questions:
➢ What is the range of operating frequencies for which this hgc bipolar process is optimized?
➢ What are the minimum feature sizes for the hip resistor and the 1st layer metal according to the design rules?
➢ What is the typical collector-emitter voltage (vce) for the npn transistor when determining its ft value?
# HGC Bipolar Process
## Overview
️· HGC is a double-polysilicon trench isolated bipolar process optimized for RF applications in the range 900 MHz to 2.4 GHz.
️· Data Sheet DS00104 / June 2010.
️· Information provided is for general purposes only, not a warranty or representation.
️· Subject to Plessey’s standard trading terms.
## Key Features
️· Integrated inductors (optional)
️· 470 MHz lateral pnps
️· Varactor diodes - 0.5 fF/μm²
️· Schottky Diodes - Vf=0.5 V
️· Polysilicon resistors - 110/155/1400 Ohms/sq
️· MIM capacitors - 0.65 fF/μm² (optional)
️· MIS capacitors - 2.75 fF/μm² (optional)
️· Two or three level metal option
## Applications
️· LNAs
️· Synthesisers
️· Cellular radios
️· Wireless LANs
️· High speed logic
## Key Parameters (Minimum Geometry Device)
️· NPN:
- fT: 22 GHz at IC=0.4 mA, Vce=3 V
- CJC: 3.3 fF
- CJE: 5.4 fF
- Bvceo: > 4.5V
## Parameters
️· NPN (0.6 x 3.0um emitter):
- fT (Ic=0.7mA, Vce=2V): 22 GHz
- HFE (Ic=10μA, Vce=2V): 140
- VAF: 63 V
- BVCEO (Ic=1μA): >4.5 V
- BVCBO (Ic=1μA): >8.0 V
- CJE (Vbe=0): 10 fF
- CJC (Vbc=0): 8 fF
- CJS (Vcs=0): 17 fF
️· Lateral PNP (1.8 X 1.8μm emitter):
- fT (Ic=40μA, Vce=2V): 470 MHz
- HFE (Ic=10μA, Vce=2V): 64
- VAF: 12 V
- BVCEO (Ic=1μA): >5.5 V
️· Polysilicon Resistor Values:
- LoP: 155 ± 20 Ω
- LoN: 110 ± 20 Ω
- HiP: 1.4 ± 0.2 kΩ
## Design Rules
️· Emitter: 0.6 X 1.6 μm, Spacing: Not specified
️· HiP resistor: Min: 1.0 μm, Spacing: 0.8 μm
️· LoP, LoN resistor: Min: 1.2 μm, Spacing: 0.8 μm
️· Contact: 1.0 X 1.6 μm, Spacing: 1.4 μm
️· 1st Layer metal: Min: 1.4 μm, Spacing: 1.0 μm
️· 2nd Layer metal: Min: 1.4 μm, Spacing: 1.0 μm
️· 3rd Layer metal: Min: 3.0 μm, Spacing: 2.0 μm
# HGC Bipolar Process
## Overview
️· HGC is a double-polysilicon trench isolated bipolar process optimized for RF applications in the range 900 MHz to 2.4 GHz.
️· Data Sheet DS00104 / June 2010.
️· Information provided is for general purposes only, not a warranty or representation.
️· Subject to Plessey’s standard trading terms.
## Key Features
️· Integrated inductors (optional)
️· 470 MHz lateral pnps
️· Varactor diodes - 0.5 fF/μm²
️· Schottky Diodes - Vf=0.5 V
️· Polysilicon resistors - 110/155/1400 Ohms/sq
️· MIM capacitors - 0.65 fF/μm² (optional)
️· MIS capacitors - 2.75 fF/μm² (optional)
️· Two or three level metal option
## Applications
️· LNAs
️· Synthesisers
️· Cellular radios
️· Wireless LANs
️· High speed logic
## Key Parameters (Minimum Geometry Device)
️· NPN:
- fT: 22 GHz at IC=0.4 mA, Vce=3 V
- CJC: 3.3 fF
- CJE: 5.4 fF
- Bvceo: > 4.5V
## Parameters
️· NPN (0.6 x 3.0um emitter):
- fT (Ic=0.7mA, Vce=2V): 22 GHz
- HFE (Ic=10μA, Vce=2V): 140
- VAF: 63 V
- BVCEO (Ic=1μA): >4.5 V
- BVCBO (Ic=1μA): >8.0 V
- CJE (Vbe=0): 10 fF
- CJC (Vbc=0): 8 fF
- CJS (Vcs=0): 17 fF
️· Lateral PNP (1.8 X 1.8μm emitter):
- fT (Ic=40μA, Vce=2V): 470 MHz
- HFE (Ic=10μA, Vce=2V): 64
- VAF: 12 V
- BVCEO (Ic=1μA): >5.5 V
️· Polysilicon Resistor Values:
- LoP: 155 ± 20 Ω
- LoN: 110 ± 20 Ω
- HiP: 1.4 ± 0.2 kΩ
## Design Rules
️· Emitter: 0.6 X 1.6 μm, Spacing: Not specified
️· HiP resistor: Min: 1.0 μm, Spacing: 0.8 μm
️· LoP, LoN resistor: Min: 1.2 μm, Spacing: 0.8 μm
️· Contact: 1.0 X 1.6 μm, Spacing: 1.4 μm
️· 1st Layer metal: Min: 1.4 μm, Spacing: 1.0 μm
️· 2nd Layer metal: Min: 1.4 μm, Spacing: 1.0 μm
️· 3rd Layer metal: Min: 3.0 μm, Spacing: 2.0 μm
| Part No. | HGC |
| Manufacturer | ETC2 |
| Size | 82 Kbytes |
| Pages | 1 page |
| Description | double-polysilicon trench isolated bipolar process |
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