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MB91F467BA Scheda tecnica(PDF) 116 Page - Cypress Semiconductor |
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MB91F467BA Scheda tecnica(HTML) 116 Page - Cypress Semiconductor |
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116 / 127 page ![]() MB91460B Series Document Number: 002-04608 Rev. *A Page 115 of 126 15.7.5 Free-Run Timer Clock (VDD5 3.0 V to 5.5 V, VSS5 AVSS5 0 V, TA 40 C to 125 C) Note: tCLKP is the cycle time of the peripheral clock. 15.7.6 Trigger Input Timing (VDD5 3.0 V to 5.5 V, VSS5 AVSS5 0 V, TA 40 C to 125 C) Note: tCLKP is the cycle time of the peripheral clock. Parameter Symbol Pin name Condition Value Unit Min Max Input pulse width tTIWH tTIWL CKn 4tCLKP ns Parameter Symbol Pin name Condition Value Unit Min Max Input capture input trigger tINP ICUn 5tCLKP ns A/D converter trigger tATGX ATGX 5tCLKP ns tTIWH tTIWL CKn VIH VIH VIL VIL ICUn, ATGX tATGX, tINP |
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