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AM652X Scheda tecnica(PDF) 123 Page - Texas Instruments

Il numero della parte AM652X
Spiegazioni elettronici  Sitara Processors
PDF  299 Pages
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Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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AM652X Scheda tecnica(HTML) 123 Page - Texas Instruments

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AM6548, AM6528, AM6546
AM6526, AM6527
www.ti.com
SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018
Submit Documentation Feedback
Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527
Specifications
Copyright © 2017–2018, Texas Instruments Incorporated
Table 5-4. Analog OSC Buffers DC Electrical Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
MIN
TYP
MAX
UNIT
1.8-V MODE High Frequency Oscillator
BALL NAMES in Mode 0: WKUP_OSC0_XI / WKUP_OSC0_XO / OSC1_XI / OSC1_XO
BALL NUMBERS: C22 / E22 / AD5 / AE6
VIH
Input high-level threshold
0.65 ×
VDDS
V
VIL
Input low-level threshold
0.35 ×
VDDS
V
COSC
Crystal Shunt capacitance
4
pF
CLC
Load Capacitance
12
24
pF
TDC
Output duty cycle on core port
40
50
60
%
1.8-V MODE Low Frequency Oscillator
BALL NAMES in Mode 0:
WKUP_LFOSC0_XI, WKUP_LFOSC0_XO
BALL NUMBERS: AC4 / AE4
VIH
Input high-level threshold
0.65 ×
VDDS
V
VIL
Input low-level threshold
0.35 ×
VDDS
V
COSC
Crystal Shunt capacitance
1.35
pF
CLC
Load Capacitance
12
24
µF
TDC
Output duty cycle on core port
45
50
55
%
(1) VDDS in this table stands for corresponding power supply. For more information on the power supply name and the corresponding ball,
see Table 4-1, POWER [9] column.
Table 5-5. UHS-I MMC (8bit PHY) Buffers DC Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
MIN
NOM
MAX
UNIT
BALL NAMES in Mode 0: MMC0_CLK / MMC0_CMD / MMC0_DS / MMC0_DAT[7:0] / MMC1_CLK / MMC1_CMD / MMC1_DAT[3:0] /
MMC0_CALPAD / MMC1_CALPAD
BALL NUMBERS: A24 / A25 / A26 / B25 / B26 / B27 / C25 / C26 / C27 / C28 / D24 / D25 / D26 / D27 / D28 / E24 / E25 / E27 / F23
1.8-V Mode
VIH
Input high-level voltage
0.65 ×
VDDS
VDDS
VDDS+0.3
V
VIL
Input low-level voltage
VDDS-0.3
VSSQ
0.35 ×
VDDS
V
VHYS
Input hysteresis voltage
50
mV
IIN
Input current at each I/O pin
30
µA
IOZ
IOZ(IPAD Current) for BIDI cell. This current is contributed by
the tristated driver leakage + input current of the Rx + weak
pullup/pulldown leakage. PAD is swept from 0 to VDDS and
the Max(I(PAD)) is measured and is reported as IOZ
30
µA
IIN with pulldown enabled
Input current at each I/O pin with weak pulldown enabled
measured when PAD = VDDS
50
120
210
µA
IIN with pullup enabled
Input current at each I/O pin with weak pullup enabled
measured when PAD = 0
60
120
200
µA
CPAD
Pad capacitance (including package capacitance)
5
pF
VOH
Output high-level threshold (IOH = 2 mA)
0.75 ×
VDDS
V
VOL
Output low-level threshold (IOL = 2 mA)
0.125 ×
VDDS
V



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