DSP56857 datasheet(378/662 Pages) FREESCALE

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5685X Digital Signal Controller User Manual, Rev. 4

13-12

Freescale Semiconductor

•

0011 = Counter 3 input pin (TIO3)

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0100 = Counter 0 output pin (OFLAG0)

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0101 = Counter 1 output pin (OFLAG1)

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0110 = Counter 2 output pin (OFLAG2)

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0111 = Counter 3 output pin (OFLAG3)

•

1000 = Prescaler (IPBus clock divide-by 1)

•

1001 = Prescaler (IPBus clock divide-by 2)

•

1010 = Prescaler (IPBus clock divide-by 4)

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1011 = Prescaler (IPBus clock divide-by 8)

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1100 = Prescaler (IPBus clock divide-by 16)

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1101 = Prescaler (IPBus clock divide-by 32)

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1110 = Prescaler (IPBus clock divide-by 64)

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1111 = Prescaler (IPBus clock divide-by 128)

Note:

A timer selecting its own output for input is not a legal choice. The result is no

counting.

13.9.1.3 Secondary Count Source (SCS)—Bits 8–7

These bits provide additional information, such as direction used for counting. They also define

the source used by both the Capture mode bits and the Input Edge Flag in the Channel Status and

Control register.

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00 = Counter 0 input pin (TIO0)

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01 = Counter 1 input pin (TIO1)

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10 = Counter 2 input pin (TIO2)

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11 = Counter 3 input pin (TIO3)

13.9.1.4 Count Once (ONCE)—Bit 6

This bit select continuous or one-shot counting mode.

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0 = Count repeatedly

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1 = Count till compare and then stop. If counting up, successful compare occurs when

counter reaches CMP1 value. If counting down, successful compare occurs when counter

reaches CMP2 value.

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