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DSP56857 Scheda tecnica(PDF) 501 Page - Freescale Semiconductor, Inc |
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DSP56857 Scheda tecnica(HTML) 501 Page - Freescale Semiconductor, Inc |
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501 / 662 page ![]() Appendix - A Glossary, Rev. 4 Freescale Semiconductor A-15 TIDLE Transmitter Idle TIIE Transmitter Idle Interrupt Enable Time-Slot A frame divided into time-slots, allowing for the transfer of a word of data TIRQ Test Interrupt Request Register TISR Test Interrupt Source Register TM Test Mode bit TMEL Time Limit TMODE Test Mode bit TMR Quadrature Timer TMR PD Timer I/O Pull-up Disable TNVHL TNVH Limit TNVSL TNVS Limit TO Trace Occurrence TOD Time of Day Module TOF Timer Overflow Flag TOFIE Timer Oerflow Flag Interrupt Enable TOPNEG Top-side PWM Polarity Bit TPROGL Tprog Limit TPGSL TPGS Limit TRCVL TRCV Limit TRDY Transmit Ready Flag Bit TREQ Transmit Reuest Enable Bit TSTREG Test Register TXDE Transmit Data Register Empty Bit UIR Upper Initialization Register UPOS Upper Position Hold Register UPOSH Upper Position Hold Register VAB Vector Address Bus VBA Vector Base Address are pins on the 56800E core VCO Voltage Controlled Oscillator VDD Voltage Digital Drain (Power) VDDA Analog Power |
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