DSP56857 datasheet(585/662 Pages) FREESCALE

585 / 662 page

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Date:

Programmer:

Sheet

56F853/854/855/857/858 Digital Signal Controller User Manual, Rev. 4

B-83

Freescale Semiconductor

Preliminary

16 of 16

15 - 0

RSMA

Receive Slot Mask A

The Receive Slot Mask Registers are two 16-bit read/write registers. In the Network mode,

these registers are used by the receiver to determine which action to take in the current time

slot. Depending on the setting of the bits, the receiver either ignores the receiver data

signal(s), or receives a data word, generating the appropriate receive status. RSMA and

RSMB can be viewed as one 32-bit register, RSM. Bit n in RSM (RSMn) is an enable/disable

control bit for time slot N.

Data is not transferred from the Receive Shift Register (RXSR) to the Receive Data

(SRX) register, therefore the RDR and ROE flags are not set

The receive sequence proceeds normally. Data is received during slot N, and the RDR

flag is set

31 - 16

RSMB

Receive Slot Mask B

The Receive Slot Mask Registers are two 16-bit read/write registers. In the Network mode,

these registers are used by the receiver to determine which action to take in the current time

slot. Depending on the setting of the bits, the receiver either ignores the receiver data

signal(s), or receives a data word, generating the appropriate receive status. RSMA and

RSMB can be viewed as one 32-bit register, RSM. Bit n in RSM (RSMn) is an enable/disable

control bit for time slot N.

Data is not transferred from the Receive Shift Register (RXSR) to the Receive Data

(SRX) register, therefore the RDR and ROE flags are not set

The receive sequence proceeds normally. Data is received during slot N, and the RDR

flag is set

ESSI Receive Slot Mask Registers (RSMA, RSMB)

ESSI

ESSI Receive Slot

Mask Register

(RSMB)

Base + $F

Bits

Read

RSMB [31:16]

Write

Reset

1111

ESSI Receive Slot

Mask Register

(RSMA)

Base + $E

Bits

Read

RSMA [15:0]

Write

Reset

11111

1111

111

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