AR8327-AL1A-R datasheet(376/394 Pages) ETC2

376 / 394 page

376 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch

Atheros Communications, Inc.

376 • June 2011

COMPANY CONFIDENTIAL

3.12 EEE Capability Register

Address Offset: 0x014, or 0d020

Device Address = 3

Table 3-398, “EEE Capability Register,” on page 376 summarizes the Register

Table 3-398.

EEE Capability Register

3.12.1

EEE Wake Error Counter

Address Offset: 0x016, or 0d022

Device Address = 3

Table 3-399 summarizes the Register

Table 3-399.

EEE Wake Error Counter

Bit

Symbol

Type

Description

15:3

Reserved

Mode

R/O

Always 0.

HW Rst

SW Rst

1000BT EEE

Mode

R/O

EEE is supported for 1000Base-T.

HW Rst

SW Rst

100BT EEE

Mode

R/O

EEE is supported for 100Base-T.

HW Rst

SW Rst

Reserved

Mode

R/W

Always 0.

HW Rst

SW Rst

Bit

Symbol

Type

Description

15:0

EEE wake error counter

Mode

R/O

Count wake time faults where the PHY

fails to complete its normal wake

sequence within the time required for

the specific PHY type.

This counter is clear after read, and

hold at all ones in the case of overflow.

HW Rst

SW Rst

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