XRT7250 datasheet(230/463 Pages) EXAR

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DS3/E3 FRAMER IC

XRT7250

REV. 1.1.1

211

Interfacing the Receive Overhead Data Output In-

terface block to the Terminal Equipment (Method

Figure 90 illustrates how one should interface the Re-

ceive Overhead Data Output Interface block to the

Terminal Equipment, when using Method 2 to sample

and process the overhead bits from the inbound DS3

data stream.

TABLE 43: LISTING AND DESCRIPTION OF THE PIN ASSOCIATED WITH THE RECEIVE OVERHEAD DATA OUTPUT

INTERFACE BLOCK (METHOD 2)

SIGNAL NAME

TYPE

DESCRIPTION

RxOH

Output

Receive Overhead Data Output pin:

The XRT7250 will output the overhead bits, within the incoming DS3 frames, via this pin.

The Receive Overhead Output Interface will pulse the RxOHEnable output pin (for one RxOut-

Clk period) at approximately the middle of the RxOH bit period. The user is advised to design

the Terminal Equipment to latch the contents of the RxOH output pin, whenever the RxOHEn-

able output pin is sampled "High" on the falling edge of RxOutClk.

RxOHEnable

Output

Receive Overhead Data Output Enable - Output pin:

The XRT7250 will assert this output signal for one RxOutClk period when it is safe for the Ter-

minal Equipment to sample the data on the RxOH output pin.

RxOHFrame

Output

Receive Overhead Data Output Interface - Start of Frame Indicator:

The XRT7250 will drive this output pin "High" (for one period of the RxOH signal), whenever

the first overhead bit, within a given DS3 frame is being driven onto the RxOH output pin.

RxOutClk

Output

Receive Section Output Clock Signal:

This clock signal is derived from the RxLineClk signal (from the LIU) for loop-timing applica-

tions, and the TxInClk signal (from a local oscillator) for local-timing applications. For DS3

applications, this clock signal will operate at 44.736MHz.

The user is advised to design the Terminal Equipment to latch the contents of the RxOH pin,

anytime the RxOHEnable output signal is sampled "High" on the falling edge of this clock sig-

nal.

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