XRT7250 datasheet(252/463 Pages) EXAR

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DS3/E3 FRAMER IC

XRT7250

REV. 1.1.1

233

Bit 1 (RxLAPD Interrupt Enable) within the RxDS3

LAPD Control Register, as indicated below.

Writing a “1” into this bit-field enables the Receive

LAPD Message Interrupt. Conversely, writing a “0”

into this bit-field disables the Receive LAPD Message

interrupt.

Servicing the Receive LAPD Message Interrupt

Whenever the XRT7250 Framer IC generates this in-

terrupt, it will do the following.

• It will assert the Interrupt Request output pin (INT)

by driving it "Low".

• It will set Bit 0 (RxLAPD Interrupt Status), within the

Rx DS3 LAPD Control Register to “1”, as indicated

below.

• It will write the contents of this newly Received

LAPD Message into the Receive LAPD Message

buffer (located at 0xDE through 0x135).

Whenever the Terminal Equipment encounters the

Receive LAPD Interrupt, then it should read out the

contents of the Receive LAPD Message buffer, and

respond accordingly.

RXDS3 LAPD CONTROL REGISTER (ADDRESS = 0X18)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Not Used

RxLAPD

Enable

RxLAPD

Interrupt

Enable

RxLAPD

Interrupt

Status

R/W

RUR

0000

RXDS3 LAPD CONTROL REGISTER (ADDRESS = 0X18)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Not Used

RxLAPD

Enable

RxLAPD

Interrupt

Enable

RxLAPD

Interrupt

Status

R/W

RUR

0000

011

XRT7250 Scheda tecnica(PDF) 252 Page - Exar Corporation

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