XRT7250 datasheet(459/463 Pages) EXAR

459 / 463 page

XRT7250

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DS3/E3 FRAMER IC

REV. 1.1.1

440

Writing a “1” into this bit-field enables the Receive

LAPD Message Interrupt. Conversely, writing a “0”

into this bit-field disables the Receive LAPD Message

Interrupt.

Servicing the Receive LAPD Message Interrupt

Whenever the XRT7250 Framer IC generates this in-

terrupt, it will do the following.

• It will assert the Interrupt Request output pin (INT),

by driving it “Low”.

• It will set Bit 0 (RxLAPD Interrupt Status), within the

Rx E3 LAPD Control register to “1”, as indicated

below.

• It will write the contents of the newly Received

LAPD Message into the Receive LAPD Message

buffer (located at 0xDE through 0x135).

Whenever the Terminal Equipment encounters the

Receive LAPD Message Interrupt, then it should read

out the contents of the Receive LAPD Message buff-

er, and respond accordingly.

RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Not Used

DL from NR

RxLAPD

Enable

RxLAPD

Interrupt

Enable

RxLAPD

Interrupt

Status

R/W

RUR

000

RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Not Used

DL from NR

RxLAPD

Enable

RxLAPD

Interrupt

Enable

RxLAPD

Interrupt

Status

R/W

RUR

000

011

XRT7250 Scheda tecnica(PDF) 459 Page - Exar Corporation

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