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STM32F722IC Scheda tecnica(PDF) 199 Page - STMicroelectronics |
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STM32F722IC Scheda tecnica(HTML) 199 Page - STMicroelectronics |
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199 / 229 page ![]() DS11853 Rev 6 199/229 STM32F722xx STM32F723xx Electrical characteristics 201 Figure 76. Quad-SPI timing diagram - SDR mode Figure 77. Quad-SPI timing diagram - DDR mode 6.3.32 SD/SDIO MMC card host interface (SDMMC) characteristics Unless otherwise specified, the parameters given in Table 113 for the SDIO/MMC interface are derived from tests performed under the ambient temperature, fPCLK2 frequency and VDD supply voltage conditions summarized in Table 16, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 11 • Capacitive load C = 30 pF • Measurement points are done at CMOS levels: 0.5VDD Refer to Section 6.3.20: I/O port characteristics for more details on the input/output characteristics. MSv36878V1 Data output D0 D1 D2 Clock Data input D0 D1 D2 t(CK) tw(CKH) tw(CKL) tr(CK) tf(CK) ts(IN) th(IN) tv(OUT) th(OUT) MSv36879V1 Data output D0 D2 D4 Clock Data input D0 D2 D4 t(CK) tw(CKH) tw(CKL) tr(CK) tf(CK) tsf(IN) thf(IN) tvf(OUT) thr(OUT) D1 D3 D5 D1 D3 D5 tvr(OUT) thf(OUT) tsr(IN) thr(IN) |
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