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KSZ8563R Scheda tecnica(PDF) 197 Page - Microchip Technology |
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KSZ8563R Scheda tecnica(HTML) 197 Page - Microchip Technology |
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197 / 221 page ![]() 2017-2018 Microchip Technology Inc. DS00002418D-page 197 KSZ8563R 6.4.2.2 MII Input Timing in MAC Mode Figure 6-3 illustrates a read operation by the KSZ8563R from a PHY or other device while operating the KSZ8563R in MAC Mode. FIGURE 6-3: MII INPUT TIMING IN MAC MODE TABLE 6-4: MII INPUT TIMING IN MAC MODE VALUES Symbol Description Min Typ Max Units tP (100BASE-TX / 10BASE-T) TX_CLK period 40/400 ns tWL (100BASE-TX / 10BASE-T) TX_CLK pulse width low 20/200 ns tWH (100BASE-TX / 10BASE-T) TX_CLK pulse width high 20/200 ns tSU1 TXD[3:0] setup time to rising edge of TX_CLK 10 ns tSU2 TX_EN, TX_ER setup time to rising edge of TX_CLK 10 ns tHD1 TXD[3:0] hold time from rising edge of TX_CLK 10 ns tHD2 TX_EN, TX_ER hold time from rising edge of TX_CLK 10 ns |
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