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AM652X Scheda tecnica(PDF) 198 Page - Texas Instruments

Il numero della parte AM652X
Spiegazioni elettronici  AM654x, AM652x Sitara??Processors Silicon Revision 2.1
PDF  282 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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AM652X Scheda tecnica(HTML) 198 Page - Texas Instruments

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GPMC_CSn[x]
GPMC_BE0n_CLE
GPMC_ADVn_ALE
GPMC_OEn_REn
GPMC_FCLK
GPMC_WAIT[x]
GNF10
GNF14
GNF15
GNF12
GNF13
DATA
GPMC_AD[15:0]
GPMC_14
A.
GNF12 parameter illustrates amount of time required to internally sample input data. It is expressed in number of GPMC functional
clock cycles. From start of read cycle and after GNF12 functional clock cycles, input data will be internally sampled by active functional
clock edge. GNF12 value must be stored inside AccessTime register bits field.
B.
GPMC_FCLK is an internal clock (GPMC functional clock) not provided externally.
C.
In GPMC_CSn[x], x is equal to 0, 1, 2 or 3. In GPMC_WAIT[x], x is equal to 0 or 1.
Figure 7-61. GPMC and NAND Flash—Data Read Cycle
GPMC_FCLK
GPMC_CSn[x]
GPMC_BE0n_CLE
GPMC_ADVn_ALE
GPMC_OEn_REn
GPMC_WEn
DATA
GNF0
GNF1
GNF4
GNF9
GNF3
GNF6
GPMC_AD[15:0]
GPMC_15
A.
In GPMC_CSn[x], x is equal to 0, 1, 2 or 3.
Figure 7-62. GPMC and NAND Flash—Data Write Cycle
For more information, see section General-Purpose Memory Controller (GPMC) in the device TRM.
7.9.5.11 HyperBus
Note
HyperBus is not available on this device.
For more details about features and additional description information on the device Hyperbus, see the
corresponding sections within Section 6.3, Signal Descriptions and Section 8, Detailed Description.
Section 7.9.5.11.1, Section 7.9.5.11.2, and Section 7.9.5.11.3 assume testing over the recommended operating
conditions and electrical characteristic conditions (see Figure 7-63, Figure 7-64, and Figure 7-65).
AM6548, AM6528, AM6526
SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021
www.ti.com
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: AM6548 AM6528 AM6526



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