Motore di ricerca datesheet componenti elettronici
  Italian  ▼
ALLDATASHEETIT.COM

X  

Preview PDF HTML

STM32WLE4JC Scheda tecnica(PDF) 115 Page - STMicroelectronics

Il numero della parte STM32WLE4JC
Spiegazioni elettronici  Multiprotocol LPWAN 32-bit Arm® Cortex®-M4 MCUs, LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM
PDF  146 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32WLE4JC Scheda tecnica(HTML) 115 Page - STMicroelectronics

Back Button STM32WLE4JC Datasheet HTML 111Page - STMicroelectronics STM32WLE4JC Datasheet HTML 112Page - STMicroelectronics STM32WLE4JC Datasheet HTML 113Page - STMicroelectronics STM32WLE4JC Datasheet HTML 114Page - STMicroelectronics STM32WLE4JC Datasheet HTML 115Page - STMicroelectronics STM32WLE4JC Datasheet HTML 116Page - STMicroelectronics STM32WLE4JC Datasheet HTML 117Page - STMicroelectronics STM32WLE4JC Datasheet HTML 118Page - STMicroelectronics STM32WLE4JC Datasheet HTML 119Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 115 / 146 page
background image
DS13105 Rev 9
115/146
STM32WLE5/E4xx
Electrical characteristics
133
tLATR
Trigger conversion
latency
CKMODE = 00
2
-
3
1/fADC
CKMODE = 01
6.5
1/fPCLK
CKMODE = 10
12.5
CKMODE = 11
3.5
ts
Sampling time
fADC = 35 MHz
0.043
-
4.59
µs
-1.5
-
160.5
1/fADC
tADCVREG_STUP
ADC voltage regulator
start-up time
--
-
20
µs
tCONV
Total conversion time
(including sampling
time)
fADC = 35 MHz
Resolution = 12 bits
0.40
-
4.95
µs
Resolution = 12 bits
ts + 12.5 cycles for successive
approximation
= 14 to 173
1/fADC
tIDLE
Laps of time allowed
between two
conversions without
rearm
--
-
100
µs
IDDA(ADC)
ADC consumption
from VDDA
fs = 2.5 Msps
-
410
-
µA
fs = 1 Msps
-
164
-
fs = 10 ksps
-
17
-
IDDV(ADC)
ADC consumption
from VREF+
single ended mode
fs = 2.5 Msps
-
65
-
µA
fs = 1 Msps
-
26
-
fs = 10 ksps
-
0.26
-
1. Guaranteed by design
2. I/O analog switch voltage booster must be enabled (BOOSTEN = 1 in the SYSCFG_CFGR1) when VDDA < 2.4 V and
disabled when VDDA ≥ 2.4 V.
Table 77. ADC characteristics(1) (continued)
Symbol
Parameter
Conditions(2)
Min
Typ
Max
Unit
Table 78. Maximum ADC RAIN values
Resolution
Sampling cycle at 35 MHz (ns)
Sampling time at 35 MHz (ns)
Max. RAIN(1)(2)(Ω)
12 bits
1.5(3)
43
50
3.5
100
680
7.5
214
2200
12.5
357
4700
19.5
557
8200
39.5
1129
15000
79.5
2271
33000
160.5
4586
50000



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Scheda tecnica Scarica

Go To PDF Page


Link URL



Lei ha avuto il aiuto da alldatasheet?  [ DONATE ] 

Di alldatasheet   |   Richest di pubblicita   |   contatti   |   Privacy Policy   |   Collegamento alla scheda tecnica    |   scambio Link   |   Ricerca produttore
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com