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SWCS049H Scheda tecnica(PDF) 119 Page - Texas Instruments |
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SWCS049H Scheda tecnica(HTML) 119 Page - Texas Instruments |
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119 / 144 page ![]() 119 TPS65911 www.ti.com SWCS049S – JUNE 2010 – REVISED AUGUST 2018 Submit Documentation Feedback Product Folder Links: TPS65911 Detailed Description Copyright © 2010–2018, Texas Instruments Incorporated Table 6-87. PWM_CTRL2_REG Address Offset 0x6F Instance Reset Domain: GENERAL RESET Description PWM duty cycle. Type RW 7 6 5 4 3 2 1 0 FREQ_DUTY_CYCLE Bits Field Name Description Type Reset 7:0 FREQ_DUTY_CYCLE Duty cycle of PWM: 00000000: 0/256 ... 11111111: 255/256 RW 0x00 Table 6-88. SPARE_REG Address Offset 0x70 Instance Reset Domain: FULL RESET Description Spare functional register Type RW 7 6 5 4 3 2 1 0 SPARE Bits Field Name Description Type Reset 7:0 SPARE Spare bits RW 0x00 Table 6-89. VERNUM_REG Address Offset 0x80 Instance Reset Domain: FULL RESET Description Silicon version number Type RW 7 6 5 4 3 2 1 0 READ_BOOT Reserved VERNUM Bits Field Name Description Type Reset 7 READ_BOOT To enable the read of the BOOT mode if you want to go to JTAG mode, this be must set to 1. RW 0 6:4 Reserved Reserved bit RO R returns 0s 0x0 3:0 VERNUM Value depending on silicon version number 0000 - Revision 1.0 RO 0x0 |
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