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AM6421...ALV Scheda tecnica(PDF) 195 Page - Texas Instruments

Il numero della parte AM6421...ALV
Spiegazioni elettronici  AM64x Sitara™ Processors
PDF  244 Pages
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AM6421...ALV Scheda tecnica(HTML) 195 Page - Texas Instruments

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7.10.5.16.1 PRU_ICSSG Programmable Real-Time Unit (PRU)
Note
The PRU_ICSSG PRU signals have different functionality depending on the mode of operation. The
signal naming in this section matches the naming used in the PRU Module Interface section in the
device TRM.
Table 7-107. PRU_ICSSG PRU Timing Conditions
PARAMETER
MIN
MAX
UNIT
INPUT CONDITIONS
SRI
Input slew rate
1
3
V/ns
OUTPUT CONDITIONS
CL
Output load capacitance
2
30
pF
7.10.5.16.1.1 PRU_ICSSG PRU Direct Output Mode Timing
Table 7-108. PRU_ICSSG PRU Switching Characteristics – Direct Output Mode
see Figure 7-91
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
PRDO1
tsk(GPO-GPO)
Skew, GPO to GPO
3
ns
GPO[n:0]
PRDO1
PRU_TIMING_02
A.
n in GPO[n:0] = 19.
Figure 7-91. PRU_ICSSG PRU Direct Output Timing
7.10.5.16.1.2 PRU_ICSSG PRU Parallel Capture Mode Timing
Table 7-109. PRU_ICSSG PRU Timing Requirements – Parallel Capture Mode
see Figure 7-92 and Figure 7-93
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
PRPC1
tc(CLOCK)
Cycle time, CLOCKIN
20
ns
PRPC2
tw(CLOCKL)
Pulse duration, CLOCKIN low
0.45P(1)
ns
PRPC3
tw(CLOCKH)
Pulse duration, CLOCKIN high
0.45P(1)
ns
PRPC4
tsu(DATAIN-CLOCK)
Setup time, DATAIN valid before CLOCKIN active edge
4
ns
PRPC5
th(CLOCK-DATAIN)
Hold time, DATAIN valid after CLOCKIN active edge
0
ns
(1)
P = CLOCKIN cycle time in ns
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AM6442, AM6441, AM6421, AM6412, AM6411
SPRSP56D – JANUARY 2021 – REVISED JULY 2022
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