MPC8540 datasheet(205/1302 Pages) FREESCALE

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Functional Description

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

4-19

4.4.3.12 PCI Width Configuration

The PCI width configuration input, shown in Table 4-20, configures the PCI/PCI-X interface to

32- or 64-bit extended mode of operation. Note that the value latched on this signal during POR

is accessible through the PORDEVSR described in Section 18.4.1.4, “POR Device Status Register

(PORDEVSR).”

4.4.3.13 PCI I/O Impedance

The PCI I/O impedance input, shown in Table 4-21, selects the impedance of the PCI I/O drivers.

Note that the values latched on these signals during POR are accessible through PORIMPSCR,

described in Section 18.4.1.3, “POR I/O Impedance Status and Control Register (PORIMPSCR).”

4.4.3.14 PCI Arbiter Configuration

The PCI arbiter configuration input, shown in Table 4-22, enables the on-chip PCI/PCI-X arbiter.

Note that the value latched on this signal during POR is accessible through the PORDEVSR

described in Section 18.4.1.4, “POR Device Status Register (PORDEVSR).”

Table 4-19. RapidIO Device ID

Functional Signals

Reset Configuration

Name

Meaning

TSEC2_TXD2

cfg_dev_ID5

Device ID used for RapidIO hosts

TSEC2_TXD3

cfg_dev_ID6

Device ID used for RapidIO hosts

TSEC2_TXD4

cfg_dev_ID7

Device ID used for RapidIO hosts

Table 4-20. PCI-32 Configuration

Functional

Signal

Reset Configuration

Name

Value

(Binary

)

Meaning

PCI_REQ6

cfg_pci_width

The PCI/PCI-X interface operates as a 64-bit interface.

Default (1)

The PCI/PCI-X interface operates as a 32-bit interface (default).

Table 4-21. PCI I/O Impedance

Functional

Signal

Reset Configuration

Name

Value

(Binary)

Meaning

PCI_GNT1

cfg_pci_impd

25-

Ω I/O drivers are used on the PCI interface.

Default (1)

42-

Ω I/O drivers are used on the PCI interface (default).

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