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DSPIC30F Scheda tecnica(PDF) 106 Page - Microchip Technology |
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DSPIC30F Scheda tecnica(HTML) 106 Page - Microchip Technology |
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106 / 248 page ![]() dsPIC30F DS70083G-page 104 Preliminary 2004 Microchip Technology Inc. FIGURE 14-1: SPI BLOCK DIAGRAM FIGURE 14-2: SPI MASTER/SLAVE CONNECTION Note: x = 1 or 2. Read Write Internal Data Bus SDIx SDOx SSx SCKx SPIxSR SPIxBUF bit 0 Shift Clock Edge Select F CY Primary 1, 4, 16, 64 Enable Master Clock Prescaler Secondary Prescaler 1,2,4,6,8 SS and FSYNC Control Clock Control Transmit SPIxBUF Receive Serial Input Buffer (SPIxBUF) Shift Register (SPIxSR) MSb LSb SDOx SDIx PROCESSOR 1 SCKx SPI Master Serial Input Buffer (SPIyBUF) Shift Register (SPIySR) LSb MSb SDIy SDOy PROCESSOR 2 SCKy SPI Slave Serial Clock Note: x = 1 or 2, y = 1 or 2. |
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