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ST72F324J2T3 Scheda tecnica(PDF) 119 Page - STMicroelectronics |
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ST72F324J2T3 Scheda tecnica(HTML) 119 Page - STMicroelectronics |
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119 / 163 page ![]() ST72324 119/163 OPERATING CONDITIONS (Cont’d) 12.4 LVD/AVD CHARACTERISTICS 12.4.1 Operating Conditions with Low Voltage Detector (LVD) Subject to general operating conditions for TA Notes: 1. Data based on characterization results, not tested in production. 2. If the medium or low thresholds are selected, the detection may occur outside the specified operating voltage range. 12.4.2 Auxiliary Voltage Detector (AVD) Thresholds Subject to general operating conditions for TA 1. Data based on characterization results not tested in production. Symbol Parameter Conditions Min Typ Max Unit VIT+(LVD) Reset release threshold (VDD rise) VD level = High in option byte 4.0 1) 4.2 4.5 V VD level = Med. in option byte2) 3.55 1) 3.75 4.01) VD level = Low in option byte2) 2.95 1) 3.15 3.351) VIT-(LVD) Reset generation threshold (VDD fall) VD level = High in option byte 3.8 4.0 4.25 1) VD level = Med. in option byte2) 3.351) 3.55 3.751) VD level = Low in option byte2) 2.81) 3.0 3.15 1) Vhys(LVD) LVD voltage threshold hysteresis 1) VIT+(LVD)-VIT-(LVD) 150 200 250 mV VtPOR VDD rise time 1) 6 µs/V 100ms/V tg(VDD) Filtered glitch delay on VDD 1) Not detected by the LVD 40 ns Symbol Parameter Conditions Min Typ Max Unit VIT+(AVD) 1 ⇒0 AVDF flag toggle threshold (VDD rise) VD level = High in option byte 4.4 1) 4.6 4.9 V VD level = Med. in option byte VD level = Low in option byte 3.95 1) 3.4 1) 4.15 3.6 4.41) 3.81) VIT-(AVD) 0 ⇒1 AVDF flag toggle threshold (VDD fall) VD level = High in option byte 4.2 4.4 4.65 1) VD level = Med. in option byte VD level = Low in option byte 3.751) 3.21) 4.0 3.4 4.2 1) 3.6 1) Vhys(AVD) AVD voltage threshold hysteresis VIT+(AVD)-VIT-(AVD) 200 mV ∆V IT- Voltage drop between AVD flag set and LVD reset activated VIT-(AVD)-VIT-(LVD) 450 mV 1 |
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