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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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SPSB100 Scheda tecnica(PDF) 112 Page - STMicroelectronics |
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SPSB100 Scheda tecnica(HTML) 112 Page - STMicroelectronics |
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112 / 214 page  Bit Name Description • BUCK3_UV (SR6 - 0x36) • BUCK1_OV (SR5 - 0x35) • BUCK2_OV (SR5 - 0x35) • BUCK3_OV (SR6 - 0x36) • BUCK1_OC (SR5 - 0x35) • BUCK2_OC (SR5 - 0x35) • BUCK3_OC (SR6 - 0x36) • LDO2_UV (SR3 - 0x33) • LDO2_OV (SR3 - 0x33) • BUCKX_PG_TIMEOUT from SPI request • LDO2_PG_TIMEOUT from SPI request 0: No error (default) 1: Error detected FE1 is cleared by a read and clear command to all related bits in status registers 3, 5 and 6 26 DE Device error bit DE is a logical OR combination of global errors related to the device. • FBB_OV (SR2 - 0x32) • FBB_UV (SR2 - 0x32) • VIO_UV (SR4 - 0x34) • TSD_CLx (SR7 - 0x37) • WD_ENA_ECHO_ERROR (SR2 - 0x22) • FCCU_ENA_ECHO_ERROR (SR2 - 0x22) • NFSO1_ECHO_ERROR • IRQ_ECHO_ERROR • POWUP_NRESET_ECHO_ERROR 0: No error (default) 1: Error detected DE is cleared by a read and clear command to all related bits in status registers 2, 4 and 7 25 GW Global warning bit GW is a logical OR combination of warning flags. Warning bits do not lead to any device state change or switch off of functions. • FBB_UV_EW (SR4 - 0x34) • FBB_OV_EW (SR4 - 0x34) • VS_EW (SR4 - 0x34) • TW_CLx 0: No error (default) 1: Error detected GW is cleared by a read and clear command to all related bits in status register 2 and 4 24 FS Fail-safe The FS bit indicates that the device was forced into DEEP-SLEEP, RECOVERY-1 or -2 state due to the following fault conditions: • FCCUFAIL • WDFAIL (SR1 - 0x31) • FORCED_SLEEP_TSD (SR3 - 0x23) • FORCED_SLEEP_POWUP (SR5 - 0x25) • GNDLOSS (SR6 - 0x36) • INT_REG_UV • INT_REG_OV • CURRENT_MISMATCH • OSC_ERROR • ABIST_ERROR • LBIST_ERROR • NVM_COMP_ERROR • NVM_CRC_ERROR • SPI_REG_COMP_ERROR SPSB100 SPI registers DS14640 - Rev 1 page 112/214 |
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