PM7367 datasheet(106/323 Pages) PMC

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PM7367 FREEDM-32P32

DATA SHEET

PMC-1991499

ISSUE 2

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE

Bit

Type

Function

Default

Bit 31

Bit 16

Unused

XXXXH

Bit 15

TLGA[7]

Bit 14

TLGA[6]

Bit 13

TLGA[5]

Bit 12

TLGA[4]

Bit 11

TLGA[3]

Bit 10

TLGA[2]

Bit 9

TLGA[1]

Bit 8

TLGA[0]

Bit 7

RLGA[7]

Bit 6

RLGA[6]

Bit 5

RLGA[5]

Bit 4

RLGA[4]

Bit 3

RLGA[3]

Bit 2

RLGA[2]

Bit 1

RLGA[1]

Bit 0

RLGA[0]

This register provides activity monitoring on FREEDM-32P32 receive and

transmit link inputs. When a monitored input makes a low to high transition, the

corresponding register bit is set high. The bit will remain high until this register is

read, at which point, all the bits in this register are cleared. A lack of transitions

is indicated by the corresponding register bit reading low. This register should be

read at periodically to detect for stuck at conditions.

Note

This register is not byte addressable. Reading this register clears all the activity

bits in the register. Byte selection using byte enable signals (CBEB[3:0]) are not

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