TMP93CS44 datasheet(151/224 Pages) TOSHIBA

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TMP93CS44/S45

2004-02-10

93CS44-149

3.10.4

2C Bus Mode Control

The following registers are used for control and operation status monitoring when using

the serial bus interface (SBI) in the I2C bus mode.

Serial Bus Interface Control Register 1

Bit symbol

BC2

BC1

BC0

ACK

SCK2

SCK1

SCK0

SBICR1

(004BH)

Read/Write

R/W

After reset

Prohibit

read-modify-

write

Function

Number of transferred bits

(Note 1)

Acknowledge

mode

specification

Serial clock selection

(Note 2)

Note 1:

Set <BC2:0> to “000” before switching to a clock synchronous 8-bit SIO mode.

Note 2:

Refer to sentence of 3.10.4 (3) “Serial clock”.

Note 3:

This I

2C bus circuit does not support high-speed mode. It supports standard mode only.

Figure 3.10.3 Register for I

2C Bus Mode (1/4)

Serial clock selection

000

= 4

−

kHz

001

= 5

−

kHz

010

= 6

−

kHz

011

= 7

74.6 kHz

100

= 8

38.2 kHz

101

= 9

19.3 kHz

110

= 10

9.71 kHz

System clock: fc

Clock gear: fc/1

= 20 MHz

(Output on SCL pin)

111

(Reserved)

Acknowledge mode specification

Not generate clock pulse for acknowledge signal

Generate clock pulse for acknowledge signal

Number of transferred bits

<ACK>

= 0

<ACK>

= 1

<BC2:0> Number of

Clock

Bits

Number of

Clock

Bits

000

001

010

011

100

101

110

111

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