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KSZ9567R Scheda tecnica(PDF) 135 Page - Microchip Technology

Il numero della parte KSZ9567R
Spiegazioni elettronici  7-Port Gigabit Ethernet Switch with Audio Video Bridging and Two RGMII/MII/RMII Interfaces
PDF  233 Pages
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Produttore elettronici  MICROCHIP [Microchip Technology]
Homepage  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

KSZ9567R Scheda tecnica(HTML) 135 Page - Microchip Technology

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DS00002329E-page 135
KSZ9567R
5.2
Port Registers
This section details the device’s port registers. All settings are on a per-port basis. Address field “N” specifies the port
number. Valid values for “N” are 1 to 7 for some registers, 6 to 7 for MAC port specific registers, and 0 to 5 for PHY
specific registers.
For an overview of the device’s entire register map, refer to Section 5.0, "Device Registers". For details on the device’s
global registers, refer to Section 5.1, "Global Registers".
5.2.1
PORT N: PORT OPERATION CONTROL REGISTERS (0xN000 - 0xN0FF)
5.2.1.1
Port Default Tag 0 Register
5.2.1.2
Port Default Tag 1 Register
5.2.1.3
Port PME_WoL Event Register
Address:
0xN000
Port N: 1-7
Size:
8 bits
Bits
Description
Type
Default
7:0
Port Default 802.1Q Tag [15:8]
Bits [7:5]: Priority Code Point (PCP)
Bit [4]: Drop Eligible Indicator (DEI)
Bits [3:0]: VLAN Identifier (VID) [11:8]
R/W
0x00
Address:
0xN001
Port N: 1-7
Size:
8 bits
Bits
Description
Type
Default
7:0
Port Default 802.1Q tag [7:0]
VLAN Identifier (VID) [7:0]
R/W
0x01
Address:
0xN013
Port N: 1-7
Size:
8 bits
Bits
Description
Type
Default
7:3
RESERVED
RO
0000_0b
2
Magic Packet Detect
To be detected, the destination address of the Magic Packet must match the
Global Switch MAC Address in the Switch MAC Address 0 Register through
Switch MAC Address 5 Register.
1 = Magic Packet is detected at this port
0 = Not detected
RO/WC
0b



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