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STM32H523VCU6TR Scheda tecnica(PDF) 143 Page - STMicroelectronics |
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STM32H523VCU6TR Scheda tecnica(HTML) 143 Page - STMicroelectronics |
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143 / 228 page  DS14540 Rev 1 143/228 STM32H523xx Electrical characteristics 197 Refer to Section 5.3.14 for more details on the input/output alternate function characteristics. Asynchronous waveforms and timings Figures 22 through 24 represent asynchronous waveforms, tables 68 through 75 provide the corresponding timings. The results shown in these tables are obtained with the following FMC configuration: • AddressSetupTime = 0x1 • AddressHoldTime = 0x1 • DataSetupTime = 0x1 (except for asynchronous NWAIT mode, DataSetupTime = 0x5) • DataHoldTime(DATAHLD) = 0x1 (1 Tfmc_ker_ck for read operations and 2 Tfmc_ker_ck for write operations) • ByteLaneSetup(NBLSET)=0x1 • BusTurnAroundDuration = 0x0 • Capacitive load CL = 30 pF In all timing tables, the Tfmc_ker_ck is the fHCLK clock period. |
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