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STM32H523VCK7 Scheda tecnica(PDF) 164 Page - STMicroelectronics

Il numero della parte STM32H523VCK7
Spiegazioni elettronici  Arm Cortex -M33 32-bit MCUTrustZone FPU, 375 DMIPS Arm Cortex -M33 32-bit MCUTrustZone FPU, 375 DMIPS
PDF  228 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H523VCK7 Scheda tecnica(HTML) 164 Page - STMicroelectronics

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Electrical characteristics
STM32H523xx
164/228
DS14540 Rev 1
Figure 38. DCMI timing diagrams
5.3.21
PSSI interface characteristics
Unless otherwise specified, the parameters given in Table 86 and Table 87 are derived from
tests performed under the ambient temperature, fHCLK frequency and VDD supply voltage
summarized in Table 19 and Section 5.3.1, with the following configuration:
•
PSSI_PDCK polarity: falling
•
PSSI_RDY and PSSI_DE polarity: low
•
Bus width: 16 lines
•
DATA width: 32 bits
•
Capacitive load CL= 30 pF
•
Measurement points are done at CMOS levels: 0.5 VDD
•
I/O compensation cell activated
•
HSLV activated when VDD ≤ 2.7 V
•
Voltage scaling VOS0 selected
MS32414V2
DCMI_PIXCLK
tsu(VSYNC)
tsu(HSYNC)
DCMI_HSYNC
DCMI_VSYNC
DATA[0:13]
1/DCMI_PIXCLK
th(HSYNC)
th(HSYNC)
tsu(DATA) th(DATA)
Table 87. PSSI transmit characteristics(1)
Symbol
Parameter
Conditions
Min
Max
Unit
-
Frequency ratio PSSI_PDCK/fHCLK
--
0.4
-
PSSI_PDCK
PSSI clock input
2.7 V ≤ VDD ≤ 3.6 V
-
90(2)
MHz
1.71 V ≤ VDD ≤ 3.6 V
-
86
Dpixel
PSSI clock input duty cycle
30
70
%



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