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Motore di ricerca datesheet componenti elettronici |
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STM32F207VCY7VTR Scheda tecnica(PDF) 155 Page - STMicroelectronics |
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STM32F207VCY7VTR Scheda tecnica(HTML) 155 Page - STMicroelectronics |
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155 / 184 page  DocID15818 Rev 15 155/184 STM32F20xxx Package information 183 Figure 80. WLCSP64+2 - 66-ball, 4.539 x 4.911 mm, 0.4 mm pitch wafer level chip scale package recommended footprint e2 - 3.200 - - 0.1260 - F - 0.220 - - 0.0087 - G - 0.386 - - 0.0152 - aaa - - 0.100 - - 0.0039 bbb - - 0.100 - - 0.0039 ccc - - 0.100 - - 0.0039 ddd - - 0.050 - - 0.0020 eee - - 0.050 - - 0.0020 1. Values in inches are converted from mm and rounded to 4 decimal digits. 2. Dimension is measured at the maximum bump diameter parallel to primary datum Z. Table 89. WLCSP64 recommended PCB design rules (0.4 mm pitch) Dimension Recommended values Pitch 0.4 Dpad 0.225 mm Dsm 0.290 mm typ. (depends on the soldermask registration tolerance) Stencil opening 0.250 mm Stencil thickness 0.100 mm Table 88. WLCSP64+2 - 66-ball, 4.539 x 4.911 mm, 0.4 mm pitch wafer level chip scale package mechanical data (continued) Symbol millimeters inches(1) Min Typ Max Min Typ Max |
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