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STM32L452VCU6PTR Scheda tecnica(PDF) 108 Page - STMicroelectronics

Il numero della parte STM32L452VCU6PTR
Spiegazioni elettronici  Ultra-low-power ARM® Cortex®-M4 32-bit MCUFPU, 100DMIPS, up to 512KB Flash, 160KB SRAM, analog, audio, ext. SMPS
PDF  210 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L452VCU6PTR Scheda tecnica(HTML) 108 Page - STMicroelectronics

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Electrical characteristics
STM32L452xx
108/210
DocID029968 Rev 3
Table 40. Typical current consumption in Run, with different codesrunning from
SRAM1 and power supplied by external SMPS (VDD12 = 1.10 V)
Symbol
Parameter
Conditions(1)
TYP
Unit
TYP
Unit
-
Voltage
scaling
Code
25 °C
25 °C
IDD_ALL
(Run)
Supply
current in
Run mode
fHCLK = fHSE up to
48 MHz included,
bypass mode
PLL ON above
48 MHz all
peripherals disable
Reduced code(2)
1.04
mA
40
µA/MHz
Coremark
0.95
37
Dhrystone 2.1
1.01
39
Fibonacci
0.95
37
While(1)
0.99
38
Reduced code(2)
3.07
38
Coremark
2.79
35
Dhrystone 2.1
3.04
38
Fibonacci
2.80
35
While(1)
3.15
39
1. All values are obtained by calculation based on measurements done without SMPS and using following parameters: SMPS
input = 3.3 V, SMPS efficiency = 85%, VDD12 = 1.10 V
2. Reduced code used for characterization results provided in Table 27, Table 29, Table 31.
Table 41. Typical current consumption in Run, with different codesrunning from
SRAM1 and power supplied by external SMPS (VDD12 = 1.05 V)
Symbol
Parameter
Conditions(1)
TYP
Unit
TYP
Unit
-
Voltage
scaling
Code
25 °C
25 °C
IDD_ALL
(Run)
Supply
current in
Run mode
fHCLK = fHSE up to
48 MHz included,
bypass mode
PLL ON above
48 MHz all
peripherals disable
Reduced code(2)
0.94
mA
36
µA/MHz
Coremark
0.86
33
Dhrystone 2.1
0.92
36
Fibonacci
0.86
33
While(1)
0.90
35
1. All values are obtained by calculation based on measurements done without SMPS and using following parameters: SMPS
input = 3.3 V, SMPS efficiency = 85%, VDD12 = 1.05 V
2. Reduced code used for characterization results provided in Table 27, Table 29, Table 31.



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