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IS25LEG-RGLA2:P-TY Scheda tecnica(PDF) 149 Page - Integrated Silicon Solution, Inc

Il numero della parte IS25LEG-RGLA2:P-TY
Spiegazioni elettronici  SERIAL FLASH MEMORY 166/133MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE WITH ON-CHIP ECC
PDF  193 Pages
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Produttore elettronici  ISSI [Integrated Silicon Solution, Inc]
Homepage  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LEG-RGLA2:P-TY Scheda tecnica(HTML) 149 Page - Integrated Silicon Solution, Inc

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IS25LE01GG
IS25WE01GG
Integrated Silicon Solution, Inc.- www.issi.com
149
Rev. A3
10/02/2025
8.50 EXIT 4-BYTE ADDRESS MODE OPERATION (EX4B, 29h)
In order to be backward compatible, the Exit 4-byte Address Mode instruction allows 24bit address (A23-A0) to be
used to access the memory array up to 128Mb. The Bank Address Register must be used to access the memory
array beyond 128Mb. To execute EX4B operation, the host drives CE# low, sends the instruction code and then
drives CE# high.
A Write Enable (WREN, 06h) command is not required prior to EX4B (29h) command.
Note: The EX4B instruction will reset the Bit 7 (EXTADD) of the volatile Bank Address Register to “0” ”, but will not
change the non-volatile Bank Address Register.
Figure 8.109 Exit 4-byte Address Mode Sequence In SPI Mode
Instruction = 29h
CE#
SCK
SI
0
1
2
3
4
5
6
7
Mode 3
Mode 0
SO
High Impedance
Figure 8.110 Exit 4-byte Address Mode Sequence In QPI Mode
29h
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0



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