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STM32H533CE Scheda tecnica(PDF) 146 Page - STMicroelectronics |
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STM32H533CE Scheda tecnica(HTML) 146 Page - STMicroelectronics |
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146 / 231 page ![]() Electrical characteristics STM32H533xx 146/231 DS14539 Rev 1 Refer to Section 5.3.14 for more details on the input/output alternate function characteristics. Asynchronous waveforms and timings Figures 22 through 24 represent asynchronous waveforms, tables 69 through 76 provide the corresponding timings. The results shown in these tables are obtained with the following FMC configuration: • AddressSetupTime = 0x1 • AddressHoldTime = 0x1 • DataSetupTime = 0x1 (except for asynchronous NWAIT mode, DataSetupTime = 0x5) • DataHoldTime(DATAHLD) = 0x1 (1 Tfmc_ker_ck for read operations and 2 Tfmc_ker_ck for write operations) • ByteLaneSetup(NBLSET)=0x1 • BusTurnAroundDuration = 0x0 • Capacitive load CL = 30 pF In all timing tables, the Tfmc_ker_ck is the fHCLK clock period. |
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