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STM32H533CE Scheda tecnica(PDF) 168 Page - STMicroelectronics |
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STM32H533CE Scheda tecnica(HTML) 168 Page - STMicroelectronics |
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168 / 231 page ![]() Electrical characteristics STM32H533xx 168/231 DS14539 Rev 1 tov(DATA) Data output valid time 2.7 V ≤ VDD ≤ 3.6 V - 11 ns 1.71 V ≤ VDD ≤ 3.6 V - 11.5 toh(DATA) Data output hold time 1.71 V ≤ VDD ≤ 3.6 V 5.5 - tov((DE) DE output valid time - 11.5 toh(DE) DE output hold time 5.5 - tsu(RDY) RDY input setup time 0.5 - th(RDY) RDY input hold time 0.5 - 1. Evaluated by characterization - Not tested in production. 2. This maximal frequency does not consider receiver setup and hold timings. Table 88. PSSI transmit characteristics(1) (continued) Symbol Parameter Conditions Min Max Unit Table 89. PSSI receive characteristics(1) Symbol Parameter Conditions Min Max Unit - Frequency ratio PSSI_PDCK/fHCLK -0.4 - PSSI_PDCK PSSI clock input 1.71 V ≤ VDD ≤ 3.6 V - 100 MHz Dpixel PSSI clock input duty cycle - 30 70 % tsu(DATA) Data input setup time 1.71 V ≤ VDD ≤ 3.6 V 2.5 - ns th(DATA) Data input hold time 2.5 - tsu((DE) DE input setup time 1.5 - th(DE) DE input hold time 2 - tov(RDY) RDY output valid time - 16.5 toh(RDY) RDY output hold time 5.5 - 1. Evaluated by characterization - Not tested in production. |
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