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IS25LP02GJ-RHLA3 Scheda tecnica(PDF) 152 Page - Integrated Silicon Solution, Inc

Il numero della parte IS25LP02GJ-RHLA3
Spiegazioni elettronici  SERIAL FLASH MEMORY 166MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  182 Pages
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Produttore elettronici  ISSI [Integrated Silicon Solution, Inc]
Homepage  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP02GJ-RHLA3 Scheda tecnica(HTML) 152 Page - Integrated Silicon Solution, Inc

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IS25LP02GJ
IS25WP02GJ
Integrated Silicon Solution, Inc.- www.issi.com
152
Rev.A
10/02/2025
8.55 READ ASP OPERATION (RDASP, 2Bh)
The RDASP instruction code is shifted in by the rising edge of the SCK signal. Then the 16-bit ASP register contents
is shifted out, least significant byte first, most significant bit of each byte first. Each bit is shifted out at the SCK
frequency by the falling edge of the SCK signal. It is possible to read the ASP register continuously by providing
multiples of 16 bits.
Figure 8.121 Read ASP Sequence In SPI Mode
8
9
...
15
16
17
...
23
Instruction = 2Bh
CE#
SCK
SI
SO
0
1
2
3
4
5
6
7
Mode 3
Mode 0
tV
7
15
14
8
6
...
0
...
1st byte Data Out
2nd byte Data Out
Figure 8.122 Read ASP Sequence In QPI Mode
2Bh
CE#
SCK
IO[3:0]
0
1
Mode 3
Mode 0
2
3
4
5
1st byte
Data Out
tV
2nd byte
Data Out



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