AM261...ZEJQ1 datasheet(106/218 Pages) TI2

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6.11.3 System Timing

For more details about features and additional description information on the subsystem multiplexing signals,

see the corresponding subsections within the device specific TRM.

6.11.3.1 System Timing Conditions

PARAMETER

MIN

MAX

UNIT

INPUT CONDITIONS

SRI

Input Slew Rate

0.5

V/ns

OUTPUT CONDITIONS

Output Load Capacitance

6.11.3.2 Reset Timing

Tables and figures provided in this section define timing requirements and switching characteristics for reset

related signals.

6.11.3.2.1 PORz Timing Requirements

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

RST1

th(SUPPLIES_VALID-

PORz)

Hold time, PORz active (low) at

Power-up after supplies valid (using

external crystal)

RST3

tw(PORzL)

Pulse Width minimum, PORz low

after Power-up (without removal of

Power or system reference clock

XTAL_XI/XO)

1000

PORz

RST1

RST3

ALL SUPPLIES

VALID

Figure 6-4. PORz Timing Requirements

6.11.3.2.2 WARMRSTn Switching Characteristics

NO.

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

RST4

td(PORzL:-

WARMRSTnZ)

Delay time, PORz active (low) to WARMRSTn

high impedance

RST5

td(PORzH-

WARMRSTnL)

Delay time, PORz inactive (high) to

WARMRSTn active (low)

RST6

td(PORzH-

WARMRSTnH)

Delay time, PORz inactive (high) to

WARMRSTn inactive (high)

2000000

6000000

AM2612, AM2611, AM2611-Q1, AM2612-Q1

SPRSPA7C – SEPTEMBER 2024 – REVISED JULY 2025

www.ti.com

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