RZSLASHG2N datasheet(113/169 Pages) RENESAS

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RZ/G Series, 2nd Generation Datasheet

Section 3. Electrical Characteristics

R01DS0483EJ0101 Rev.1.01

Page 113 of 169

Jun 30, 2025

3.20 HSCIF

Table 3.20.1 HSCIF Signal Timing

Conditions: VDDQ33 = 3.3 ± 0.2 V [RZ/G2H, RZ/G2M V1.3, RZ/G2M V3.0, RZ/G2N],

VDDQ33 = 3.3 ± 0.3 V [RZ/G2E],

GND = VSS = 0 V, Tc = -40 to +115 °C [RZ/G2H, RZ/G2M V1.3], Ta = −40 to +85 °C [RZ/G2M V3.0,

RZ/G2N, RZ/G2E], Tj = -40 to +115 °C [RZ/G2M V3.0, RZ/G2N, RZ/G2E], CL = 30 pF

Item

Symbol

Min.

Typ.

Max.

Unit

Figures

Input clock cycle (asynchronous)

tSCYC

—

tCYC

Figure 3.20.1

Input clock pulse width

tSCKW

0.4

—

0.6

tSCYC

Input clock rise time

tSCKr

—

0.8

tCYC

Input clock fall time

tSCKf

—

0.8

tCYC

Note:

RZ/G2H, RZ/G2M V1.3,RZ/G2M V3.0, RZ/G2N: tCYC is for one cycle of the S3D1ϕ clock.

RZ/G2E: tCYC is for one cycle of the S3D1Cϕ clock.

Figure 3.20.1 Input Clock Timing

BRGCLK

(Internal signal)

tSCYC

tSCKW

tSCKf

tSCKr

Note: The output signal (BRGCLK) of the external baud rate generator (BRG) is an HSCIF internal signal.

Set the input signal and the DL and CKS registers of the BRG so that the BRGCLK signal can satisfy the above specification.

RZ/G2H

RZ/G2M V1.3

RZ/G2N

RZ/G2E

RZ/G2M V3.0

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