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ST20C4 Scheda tecnica(PDF) 117 Page - STMicroelectronics |
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ST20C4 Scheda tecnica(HTML) 117 Page - STMicroelectronics |
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117 / 212 page ![]() ldtrapped 117/212 ® ldtrapped load trapped process status Code: 2C F6 Description: Install the trapped process structure, to be found at the address in Breg, into the trapped process location for the trap group given by Areg and priority given by Creg, where 0 indicates high priority and 1 indicates low priority. Definition: word ′[trapped @ 0] ← word[Breg @ 0] word ′[trapped @ 1] ← word[Breg @ 1] word ′[trapped @ 2] ← word[Breg @ 2] word ′[trapped @ 3] ← word[Breg @ 3] Areg ′← undefined Breg ′← undefined Creg ′← undefined where trapped = the address of the stored trapped process for the trap group Areg and priority Creg. Error signals: Can cause a load trap trap to be signalled. Comments: Secondary instruction. See also: ldtraph sttraph sttrapped |
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