AT80SND1C-ROTIL datasheet(128/210 Pages) ATMEL

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128

AT8xC51SND1C

4109E–8051–06/03

Table 116. MMINT Register

MMINT (S:E7h Read Only) – MMC Interrupt Register

Reset Value = 0000 0011b

7654

3210

MCBI

EORI

EOCI

EOFI

F2FI

F1FI

F2EI

F1EI

Bit

Number

Bit

Mnemonic

Description

7MCBI

MMC Card Busy Interrupt Flag

Set by hardware when the card enters or exits its busy state (when the busy

signal is asserted or deasserted on the data line).

Cleared when reading MMINT.

6EORI

End of Response Interrupt Flag

Set by hardware at the end of response reception.

Cleared when reading MMINT.

5EOCI

End of Command Interrupt Flag

Set by hardware at the end of command transmission.

Clear when reading MMINT.

4EOFI

End of Frame Interrupt Flag

Set by hardware at the end of frame (stream or block) transfer.

Clear when reading MMINT.

3F2FI

FIFO 2 Full Interrupt Flag

Set by hardware when second FIFO becomes full.

Cleared by hardware when second FIFO becomes empty.

2F1FI

FIFO 1 Full Interrupt Flag

Set by hardware when first FIFO becomes full.

Cleared by hardware when first FIFO becomes empty.

1F2EI

FIFO 2 Empty Interrupt Flag

Set by hardware when second FIFO becomes empty.

Cleared by hardware when second FIFO becomes full.

0F1EI

FIFO 1 Empty Interrupt Flag

Set by hardware when first FIFO becomes empty.

Cleared by hardware when first FIFO becomes full.

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