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HD6432351 Scheda tecnica(PDF) 700 Page - Renesas Technology Corp |
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HD6432351 Scheda tecnica(HTML) 700 Page - Renesas Technology Corp |
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700 / 1025 page ![]() Section 16 D/A Converter Rev. 3.00 Sep 15, 2006 page 666 of 988 REJ09B0330-0300 16.2 Register Descriptions 16.2.1 D/A Data Registers 0 and 1 (DADR0, DADR1) 7 0 R/W 6 0 R/W 5 0 R/W 4 0 R/W 3 0 R/W 0 0 R/W 2 0 R/W 1 0 R/W Bit Initial value R/W : : : DADR0 and DADR1 are 8-bit readable/writable registers that store data for conversion. Whenever output is enabled, the values in DADR0 and DADR1 are converted and output from the analog output pins. DADR0 and DADR1 are each initialized to H'00 by a reset and in hardware standby mode. 16.2.2 D/A Control Register (DACR) 7 DAOE1 0 R/W 6 DAOE0 0 R/W 5 DAE 0 R/W 4 — 1 — 3 — 1 — 0 — 1 — 2 — 1 — 1 — 1 — Bit Initial value R/W : : : DACR is an 8-bit readable/writable register that controls the operation of the D/A converter. DACR is initialized to H'1F by a reset and in hardware standby mode. Bit 7—D/A Output Enable 1 (DAOE1): Controls D/A conversion and analog output for channel 1. Bit 7 DAOE1 Description 0 Analog output DA1 is disabled (Initial value) 1 Channel 1 D/A conversion is enabled; analog output DA1 is enabled |
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