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HD6432351 Scheda tecnica(PDF) 730 Page - Renesas Technology Corp |
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HD6432351 Scheda tecnica(HTML) 730 Page - Renesas Technology Corp |
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730 / 1025 page ![]() Section 20 Power-Down Modes Rev. 3.00 Sep 15, 2006 page 696 of 988 REJ09B0330-0300 20.6.3 Setting Oscillation Stabilization Time after Clearing Software Standby Mode Bits STS2 to STS0 in SBYCR should be set as described below. Using a Crystal Oscillator Set bits STS2 to STS0 so that the standby time is at least 8 ms (the oscillation stabilization time). Table 20.4 shows the standby times for different operating frequencies and settings of bits STS2 to STS0. Table 20.4 Oscillation Stabilization Time Settings STS2 STS1 STS0 Standby Time 20 MHz 16 MHz 12 MHz 10 MHz 8 MHz 6 MHz 4 MHz 2 MHz Unit 0 0 0 8192 states 0.41 0.51 0.68 0.8 1.0 1.3 2.0 4.1 ms 1 16384 states 0.82 1.0 1.3 1.6 2.0 2.7 4.1 8.2 1 0 32768 states 1.6 2.0 2.7 3.3 4.1 5.5 8.2 16.4 1 65536 states 3.3 4.1 5.5 6.6 8.2 10.9 16.4 32.8 1 0 0 131072 states 6.6 8.2 10.9 13.1 16.4 21.8 32.8 65.5 1 262144 states 13.1 16.4 21.8 26.2 32.8 43.6 65.6 131.2 1 0 Reserved — — — — — — — — — 1 16 states 0.8 1.0 1.3 1.6 2.0 2.7 4.0 8.0 µs : Recommended time setting Using an External Clock Any value can be set. Normally, use of the minimum time is recommended. |
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