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HD6432351 Scheda tecnica(PDF) 180 Page - Renesas Technology Corp

Il numero della parte HD6432351
Spiegazioni elettronici  16-Bit Single-Chip Microcomputer
PDF  1025 Pages
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Produttore elettronici  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432351 Scheda tecnica(HTML) 180 Page - Renesas Technology Corp

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Section 6 Bus Controller
Rev. 3.00 Sep 15, 2006 page 146 of 988
REJ09B0330-0300
Area 7
Area 7 includes the on-chip RAM and internal I/O registers. In external expansion mode, the space
excluding the on-chip RAM and internal I/O registers is external space. The on-chip RAM is
enabled when the RAME bit in the system control register (SYSCR) is set to 1; when the RAME
bit is cleared to 0, the on-chip RAM is disabled and the corresponding space becomes external
space.
When area 7 external space is accessed, the
CS7 signal can be output.
Only the basic bus interface can be used for the area 7 memory interface.
6.3.5
Areas in Normal Mode
In normal mode, a 64-kbyte address space comprising part of area 0 is controlled. Area
partitioning is not performed in normal mode. In ROM-disabled expansion mode, the space
excluding the on-chip RAM and internal I/O registers is external space. In ROM-enabled
expansion mode* the space excluding the on-chip ROM*, on-chip RAM, and internal I/O registers
is external space. The on-chip RAM is enabled when the RAME bit in the system control register
(SYSCR) is set to 1; when the RAME bit is cleared to 0, the on-chip RAM is disabled and the
corresponding space becomes external space.
When external space is accessed, the
CS0 signal can be output.
The basic bus interface or burst ROM interface can be selected.
Note: * Only applies to the H8S/2351.



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