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HD64F2149YV Scheda tecnica(PDF) 632 Page - Renesas Technology Corp |
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HD64F2149YV Scheda tecnica(HTML) 632 Page - Renesas Technology Corp |
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632 / 1075 page ![]() Section 18B Host Interface LPC Interface (LPC) Rev. 3.00 Jan 18, 2006 page 604 of 1044 REJ09B0280-0300 • Supports SERIRQ Host interrupt requests are transferred serially on a single signal line (SERIRQ). On channel 1, HIRQ1 and HIRQ12 can be generated. On channels 2 and 3, SMI, HIRQ6, and HIRQ9 to HIRQ11 can be generated. Operation can be switched between quiet mode and continuous mode. The CLKRUN signal can be manipulated to restart the PCI clock (LCLK). • Power-down functions, interrupts, etc. The LPC module can be shut down by inputting the LPCPD signal. Three pins, PME, LSMI, and LSCI, are provided for general input/output. |
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