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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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HD64F2149YV Scheda tecnica(PDF) 768 Page - Renesas Technology Corp |
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HD64F2149YV Scheda tecnica(HTML) 768 Page - Renesas Technology Corp |
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768 / 1075 page  Section 23 Clock Pulse Generator Rev. 3.00 Jan 18, 2006 page 740 of 1044 REJ09B0280-0300 23.3.2 External Clock Input Circuit Configuration: An external clock signal can be input as shown in the examples in figure 23.5. If the XTAL pin is left open, make sure that stray capacitance is no more than 10 pF. In example (b), make sure that the external clock is held high in standby mode, subactive mode, subsleep mode, and watch mode. EXTAL XTAL External clock input Open (a) XTAL pin left open EXTAL XTAL External clock input (b) Complementary clock input at XTAL pin Figure 23.5 External Clock Input (Examples) |
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