HD6433635SW datasheet(104/418 Pages) RENESAS

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5.1.1

System Control Registers

The operation mode is selected using the system control registers described in table 5.3.

Table 5.3

System Control Register

Name

Abbreviation

R/W

Initial Value

Address

System control register 1

SYSCR1

R/W

H'07

H'FFF0

System control register 2

SYSCR2

R/W

H'E0

H'FFF1

System Control Register 1 (SYSCR1)

Bit

76543210

SSBY

STS2

STS1

STS0

LSON

—

Initial value

00000111

Read/Write

R/W

—

SYSCR1 is an 8-bit read/write register for control of the power-down modes.

Upon reset, SYSCR1 is initialized to H'07.

Bit 7—Software Standby (SSBY): This bit designates transition to standby mode or watch mode.

Bit 7: SSBY

Description

• When a SLEEP instruction is executed in active mode, a transition is

made to sleep mode.

• When a SLEEP instruction is executed in subactive mode, a transition is

made to subsleep mode.

(initial value)

• When a SLEEP instruction is executed in active mode, a transition is

made to standby mode or watch mode.

• When a SLEEP instruction is executed in subactive mode, a transition is

made to watch mode.

Bits 6 to 4—Standby Timer Select 2 to 0 (STS2 to STS0): These bits designate the time the

CPU and peripheral modules wait for stable clock operation after exiting from standby mode or

watch mode to active mode due to an interrupt. The designation should be made according to the

clock frequency so that the waiting time is at least 10 ms.

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