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M38048FDHKP Scheda tecnica(PDF) 290 Page - Renesas Technology Corp |
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M38048FDHKP Scheda tecnica(HTML) 290 Page - Renesas Technology Corp |
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290 / 387 page ![]() 2-166 APPLICATION 2.13 Flash memory mode Rev.1.00 Jan 14, 2005 REJ09B0212-0100Z 3804 Group (Spec.H) 2.13.8 Notes on CPU rewrite mode (1) Operation speed During CPU rewrite mode, set the system clock φ 4.0 MHz or less using the main clock division ratio selection bits (bits 6 and 7 of address 003B16). (2) Instructions inhibited against use The instructions which refer to the internal data of the flash memory cannot be used during the CPU rewrite mode. (3) Interrupts inhibited against use The interrupts cannot be used during the CPU rewrite mode because they refer to the internal data of the flash memory. (4) Watchdog timer In case of the watchdog timer has been running already, the internal reset generated by watchdog timer underflow does not happen, because of watchdog timer is always clearing during program or erase operation. (5) Reset Reset is always valid. In case of CNVSS = “H” when reset is released, boot mode is active. So the program starts from the address contained in address FFFC16 and FFFD16 in boot ROM area. |
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