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MAC7200 Scheda tecnica(PDF) 119 Page - Freescale Semiconductor, Inc

Il numero della parte MAC7200
Spiegazioni elettronici  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Produttore elettronici  FREESCALE [Freescale Semiconductor, Inc]
Homepage  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Scheda tecnica(HTML) 119 Page - Freescale Semiconductor, Inc

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Detailed Signal Descriptions
MAC7200 Microcontroller Family Reference Manual, Rev. 2
Freescale Semiconductor
41
Serial Peripheral Interface B (DSPI_B). It can be configured to wake the system out of low-power mode
(DOZE) when an external signal is applied using the interrupt functionality.
4.3.10
PA[9] / DATA[9] / PCS[3] / NEX1EVTI — Port A I/O Pin, External
Databus, DSPI_B and Nexus Primary
PA[9] is a configurable general purpose input or output pin. It can be independently configured to provide
either high or reduced output drive, and also to enable or disable either a pull-up or pull-down resistor on
the pin. The pin is multiplexed in Primary Peripheral mode with the external Data bus line DATA[9]. In
Secondary Peripheral mode, it can be configured as a chip select pin PCS[3] when in Master mode for the
Serial Peripheral Interface B (DSPI_B). It can be configured to wake the system out of low-power mode
(DOZE) when an external signal is applied using the interrupt functionality. When the Nexus Primary Port
is selected and active, this pin is used as the Event In input.
4.3.11
PA[10:15] / DATA[10:15] — Port A I/O Pins and external Databus
PA[10] to PA[15] are configurable general purpose input or output pins. They can be independently
configured to provide either high or reduced output drive, and also to enable or disable either a pull-up or
pull-down resistor on the pin. The pin is multiplexed with the external Data bus lines DATA[10] to
DATA[15]. Each pin can be independently configured to wake the system out of low-power mode (DOZE)
when an external signal is applied using the interrupt functionality.
4.3.12
PB[0] / SDA / NEX1MCKO — Port B I/O Pin, IIC and Nexus Primary
PB[0] is a configurable general purpose input or output pin. It can be configured to provide either high or
reduced output drive, to enable or disable either a pull-up or pull-down resistor on the pin or to provide
either an open drain or push-pull pad. The port pin is multiplexed with the bidirectional IIC serial data pin.
It can be configured to wake the system out of low-power mode (DOZE) when an external signal is applied
using the interrupt functionality. When the Nexus Primary Port is selected and active, this pin is used as
the Nexus Clock output.
4.3.13
PB[1] / SCL / NEX1EVTO — Port B I/O Pin, IIC and Nexus Primary
PB[1] is a configurable general purpose input or output pin. It can be configured to provide either high or
reduced output drive, to enable or disable either a pull-up or pull-down resistor on the pin or to provide
either an open drain or push-pull pad. The port pin is multiplexed with the bidirectional IIC serial clock
pin used to provide the time base for transfers. It can be configured to wake the system out of low-power
mode (DOZE) when an external signal is applied using the interrupt functionality. When the Nexus
Primary Port is selected and active, this pin is used as the Nexus Event Out output.
4.3.14
PB[2] / SIN_A / NEX1MSEO — Port B I/O Pin, DSPI_A and Nexus
Primary
PB[2] is a configurable general purpose input or output pin. It can be configured to provide either high or
reduced output drive, to enable or disable either a pull-up or pull-down resistor on the pin or to provide



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