STM8L15 datasheet(101/122 Pages) STMICROELECTRONICS

101 / 122 page

STM8L151xx, STM8L152xx

Electrical parameters

Doc ID 15962 Rev 5

101/122

Data based on characterization results, not tested in production.

tWAKEUP

Wakeup time from OFF state.

Input code between lowest and

highest possible codes.

RL ≥5kΩ, CL≤50 pF

915

µs

PSRR+

Power supply rejection ratio (to

VDDA) (static DC measurement

)

RL≥ 5kΩ, CL≤50 pF

-60

-35

Includes supply current on VDDA and VREF+

Resistive load between DACOUT and GNDA

Output on PF0 (48-pin package only)

Capacitive load at DACOUT pin

It gives the output excursion of the DAC

Table 48.

DAC characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Table 49.

DAC accuracy

Symbol

Parameter

Conditions

Typ

Max

Unit

DNL

Differential non linearity(1)

RL ≥5kΩ, CL≤50 pF

DACOUT buffer ON(2)

1.5

12-bit

LSB

No load

DACOUT buffer OFF

1.5

INL

Integral non linearity(3)

RL ≥5kΩ, CL≤ 50 pF

DACOUT buffer ON(2)

No load

DACOUT buffer OFF

Offset

Offset error(4)

RL ≥5kΩ, CL≤ 50 pF

DACOUT buffer ON(2)

±10

±25

No load

DACOUT buffer OFF

±5

±8

Offset1

Offset error at Code 1 (5)

DACOUT buffer OFF

±1.5

±5

Gain error

RL ≥5kΩ, CL≤ 50 pF

DACOUT buffer ON(2)

±0.2

±0.5

No load

DACOUT buffer OFF

±0.3

±0.5

TUE

Total unadjusted error

RL ≥5kΩ, CL≤ 50 pF

DACOUT buffer ON(2)

12-bit

LSB

No load

DACOUT buffer OFF

812

Difference between two consecutive codes - 1 LSB.

For 48-pin packages only. For 28-pin and 32-pin packages, DAC output buffer must be kept off and no load must be

applied.

Difference between measured value at Code i and the value at Code i on a line drawn between Code 0 and last Code 1023.

Difference between measured value and ideal value = VREF/2.

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