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PIC16F1946 Scheda tecnica(PDF) 145 Page - Microchip Technology |
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PIC16F1946 Scheda tecnica(HTML) 145 Page - Microchip Technology |
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145 / 448 page ![]() 2010-2011 Microchip Technology Inc. Preliminary DS41414C-page 145 PIC16(L)F1946/1947 TABLE 12-7: SUMMARY OF REGISTERS ASSOCIATED WITH PORTF TABLE 12-8: SUMMARY OF CONFIGURATION WORDS ASSOCIATED WITH PORTF REGISTER 12-23: ANSELF: PORTF ANALOG SELECT REGISTER R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 ANSF7 ANSF6 ANSF5 ANSDF4 ANSF3 ANSF2 ANSDF1 ANSF0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-0 ANSF<7:0> : Analog Select between Analog or Digital Function on Pins RF<7:0>, respectively 0 = Digital I/O. Pin is assigned to port or digital special function. 1 = Analog input. Pin is assigned as analog input(1). Digital input buffer disabled. Note 1: When setting a pin to an analog input, the corresponding TRIS bit must be set to Input mode in order to allow external control of the voltage on the pin. Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page ADCON0 — CHS<4:0> GO/DONE ADON 166 ANSELF ANSF7 ANSF6 ANSF5 ANSF4 ANSF3 ANSF2 ANSF1 ANSF0 145 CCPxCON PxM<1:0>(1) DCxB<1:0> CCPxM<3:0> 236 CMOUT — — — — — MC3OUT MC2OUT MC1OUT 184 CM1CON1 C1INTP C1INTN C1PCH1 C1PCH0 — — C1NCH<1:0> 184 CM2CON1 C2INTP C2INTN C2PCH1 C2PCH0 — — C2NCH<1:0> 184 CPSCON0 CPSON CPSRM — — CPSRNG<1:0> CPSOUT T0XCS 332 CPSCON1 — — — — CPSCH<3:0> 333 DACCON0 DACEN DACLPS DACOE — DACPSS<1:0> — DACNSS 176 LATF LATF7 LATF6 LATF5 LATF4 LATF3 LATF2 LATF1 LATF0 137 LCDCON LCDEN SLPEN WERR — CS<1:0> LMUX<1:0> 337 LCDSE2 SE23 SE22 SE21 SE20 SE19 SE18 SE17 SE16 341 LCDSE3 SE31 SE30 SE29 SE28 SE27 SE26 SE25 SE24 341 LCDSE5 — — SE45 SE44 SE43 SE42 SE41 SE40 341 PORTF RF7 RF6RF5 RF4RF3 RF2RF1 RF0 144 SRCON0 SRLEN SRCLK2 SRCLK1 SRCLK0 SRQEN SRNQEN SRPS SRPR 190 TRISF TRISF7 TRISF6 TRISF5 TRISF4TRISF3TRISF2TRISF1TRISF0 144 Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTF. Note 1: Applies to ECCP modules only. Name Bits Bit -/7 Bit -/6 Bit 13/5 Bit 12/4 Bit 11/3 Bit 10/2 Bit 9/1 Bit 8/0 Register on Page CONFIG2 13:8 — — LVP DEBUG — BORV STVREN PLLEN 58 7:0 — —VCAPEN — — — WRT<1:0> Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by clock sources. |
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