R5F64573LFD datasheet(101/134 Pages) RENESAS

101 / 134 page

REJ03B0234-0110

Rev.1.10

Page 101 of 129

Nov 09, 2010

R32C/157 Group

5. Electrical Characteristics

Notes:

This value is the deviation from target frequency.

This value is applicable only when the main clock oscillation is stable.

This value is the time until the PLF1 bit in the PLS register becomes 1.

Table 5.11

Electrical Characteristics of Voltage Regulator for Internal Logic

(VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)

Symbol

Characteristics

Measurement

condition

Value

Unit

Min.

Typ.

Max.

VVDC1

Output voltage

1.5

Table 5.12

Electrical Characteristics of Low Voltage Detector

(VCC = 4.2 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)

Symbol

Characteristics

Measurement

condition

Value

Unit

Min.

Typ.

Max.

ΔVdet

Detected voltage error

±0.2

Vdet(R)-Vdet(F) Hysteresis width

—

Self-consuming current

VCC = 5.0 V, low voltage

detector enabled

4µA

td(E-A)

Operation start time of low voltage detector

150

µs

Table 5.13

Electrical Characteristics of Oscillator

(VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)

Symbol

Characteristics

Measurement

condition

Value

Unit

Min.

Typ.

Max.

fSO(PLL)

PLL clock self-oscillation frequency

MHz

Δf

LOCK|

Lock detection (1)

Δf

UNLOCK|

Unlock detection (1)

tLOCK(PLL)

PLL lock time (2, 3)

f(XRef) =4MHz

1ms

tjitter(p-p)

PLL jitter period (p-p)

2.0

f(OCO)

On-chip oscillator frequency

125

156

kHz

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