DOC7707 datasheet(188/307 Pages) ETC1

188 / 307 page

188

7707F–AVR–11/10

AT90USB82/162

• the USB controller clock is stopped in order to minimize the power consumption

(FRZCLK=1),

• the USB controller is disabled,

• USB is in the suspend mode,

• the Device USB controllers internal state is reset.

• The DPACC bit and the DPADD10:0 field can be set by software. The DPRAM is not cleared.

• The SPDCONF bits can be set by software.

After setting USBE, the USB Controller enters in the Device state.

The USB Controller can at any time be ‘stopped’ by clearing USBE. In fact, clearing USBE acts

as an hardware reset on the USB macro.

19.4.3

Interrupts

Two interrupts vectors are assigned to USB controller.

Figure 19-8. USB Interrupt System

The macro distinguishes between USB General events in opposition with USB Endpoints events

that are relevant with data transfers relatives to each endpoint.

Figure 19-9. USB General interrupt vector sources

USB Device

Interrupt

USB General

Interrupt Vector

Endpoint

Interrupt

USB Endpoint/Pipe

Interrupt Vector

UPRSMI

UDINT.6

UPRSME

UDIEN.6

EORSMI

UDINT.5

EORSME

UDIEN.5

WAKEUPI

UDINT.4

WAKEUPE

UDIEN.4

EORSTI

UDINT.3

EORSTE

UDIEN.3

SOFI

UDINT.2

SOFE

UDIEN.2

SUSPI

UDINT.0

SUSPE

UDIEN.0

USB General

Interrupt Vector

Asynchronous Interrupt source

(allows the CPU to wake up from power down mode)

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