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AM8530 Scheda tecnica(PDF) 149 Page - Advanced Micro Devices |
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AM8530 Scheda tecnica(HTML) 149 Page - Advanced Micro Devices |
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149 / 194 page ![]() Register Description AMD 6–39 6.3.11 Read Register 15 RR15 reflects the value stored in WR15, the External/Status IE bits. The unused bit is always returned as ‘0’ unless the corresponding bits in WR15 have been set to ‘1’. In the NMOS SCC, bits D0 and D2 always read 0. Figure 6–27 shows the bit positions for RR15. D7 D6 D5 D4 D3 D2 D1 D0 DCD IE SYNC/HUNT IE CTS IE Tx Underrun/EOM IE SDLC/HDLC Enhancement Status Zero Count IE 10 x 19-Bit Frame Status FIFO Enable Status Break/Abort IE Figure 6–27. Read Register 15 |
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