AT90PWM2 datasheet(217/365 Pages) ATMEL

217 / 365 page

217

4317K–AVR–03/2013

AT90PWM2/3/2B/3B

Figure 19-5. Manchester Frame error detection

Note:

Counter Overflow = MBURR[H:L]

When a Manchester framing error is detected the FEM bit and RxC bit are set at the same time.

This allows the application to execute the reception complete interrupt subroute when this error

conditon is detected.

When a Manchester framing error is detected, the EUSART receiver immediately enters in a

new start bit detection phase. Thus when a Manchester framing error is detected within a frame,

the receiver will process the rest of the frame as a new incomming frame and generate other

FEM errors.

Internal

Manchester

Clock

Start Bit

Bit 1

Start Bit

Bit 2

back shift

Start Bit

Bit 1

Start Bit

front shift

Bit 2

Framing Error

Manchester

Data

Manchester

Decoder

Counter

Internal

Manchester

Clock

Edge Detection

Space

N1/2

Resynchronize

Internal

Manchester

Clock

N2/4

N2/2

Counter

Overflow

Transition outside

the detect window

The counter reaches the counter overflow

value without reaching a manchester edge

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